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[Documents] how to write testbench

Description: 很好的，适合初学者Writing Efficient Testbenches
Platform: | Size: 196792 | Author: applehot@126.com | Hits:

[Embeded-SCM Develop]  148个verilog hdl小程序（有很多testbench）——

Description: 148个verilog hdl小程序（有很多testbench）——.-148 Verilog HDL small programs (many testbench) from Part
Platform: | Size: 55296 | Author: 地方 | Hits:

[Crack Hack] MD5(verilog)

Description: MD5算法的verilog实现，同时包含有testbench。-Verilog of MD5 algorithm is realized, includes testbench at the same time .
Platform: | Size: 4096 | Author: 张雷 | Hits:

[Other] 《Verilog黄金指南》中文翻译版

Description: Verilog的学习资料，可编程器件fpga的开发语言，有重点介绍Verilog的关键语法-Verilog learning materials, they simply PLD development language, and to highlight the key Verilog syntax
Platform: | Size: 468992 | Author: 张 | Hits:

[VHDL-FPGA-Verilog] Verilog HDL设计练习进阶

Description: 初学verilog HDL时 找的好资料 大家共享-Beginners should try to find a good share information
Platform: | Size: 680960 | Author: chencsw | Hits:

[VHDL-FPGA-Verilog] usb1_funct

Description: usb1.1的verilog源代码。以及其测试仿真文件，现在很难找其测试文件既testbench-usb1.1 verilog the source code. Simulation and test document, and now it is very difficult to find the paper test testbench
Platform: | Size: 52224 | Author: liuzefu | Hits:

[File Format] verilog_testbench_preliminary

Description: verilog testbench preliminary，很有用的-verilog testbench preliminary, very useful
Platform: | Size: 60416 | Author: 刘彦 | Hits:

[Other] Verilogtestbench

Description: Writing Testbenches classic book in verilog testbench-Writing Testbenchesclassic book in verilog testbench
Platform: | Size: 57344 | Author: dan | Hits:

[Other] testbench

Description: 怎样编写仿真功能的测试文件（test bench）-Learning materials, how to prepare testbench
Platform: | Size: 2608128 | Author: sophie | Hits:

[VHDL-FPGA-Verilog] 20081129464173846

Description: 介绍Verilog HDL, 内容包括： – Verilog应用 – Verilog语言的构成元素 – 结构级描述及仿真 – 行为级描述及仿真 – 延时的特点及说明 – 介绍Verilog testbench • 激励和控制和描述 • 结果的产生及验证 – 任务task及函数function – 用户定义的基本单元(primitive) – 可综合的Verilog描述风格-Introduced the Verilog HDL, including:- Verilog applications- Verilog language constitute elements- structural level description and simulation- behavioral description and simulation- and describe the characteristics of delay- to introduce incentives and Verilog testbench • • the results of control and described the emergence and Authentication- the task function task and function- the basic unit of user-defined (primitive)- can be integrated to describe the style of Verilog
Platform: | Size: 745472 | Author: 卢志文 | Hits:

[VHDL-FPGA-Verilog] test_bech

Description: verilog + testbench 文件的读写操作-verilog+ testbench
Platform: | Size: 24576 | Author: 姜广侠 | Hits:

[VHDL-FPGA-Verilog] Testbench(Verilog)

Description: verilog验证平台的使用 很不错 很详细 想具体-verilog verification platform is more like using a very good specific
Platform: | Size: 350208 | Author: guoguo | Hits:

[VHDL-FPGA-Verilog] testbench

Description: 利用system verilog写仿真测试程序，详细介绍system verilog的语法，及教程 -use system verilog write testbench
Platform: | Size: 991232 | Author: 杨永 | Hits:

[VHDL-FPGA-Verilog] A-Verilog-HDL-Test-Bench-Primer

Description: verilog testbench 编写入门，轻松教会编写测试代码-shell interpreter tutorial information, content, round and rich, from the basics
Platform: | Size: 57344 | Author: 赵玉祥 | Hits:

[VHDL-FPGA-Verilog] Verilog-testbench

Description: 北大数字集成电路课件--15_Verilog-testbench的写法.ppt-Verilog-testbench .ppt
Platform: | Size: 73728 | Author: yinxiupu | Hits:

[VHDL-FPGA-Verilog] Modsim-AND-testbench

Description: 关于fpga中，测试平台testbench的技巧，及仿真软件MOSIDISIM-About fpga skills test platform testbench, and simulation software MOSIDISIM
Platform: | Size: 6334464 | Author: kehuan | Hits:

[VHDL-FPGA-Verilog] verilog-testbench--technique

Description: verilog testbench的写法和技巧，适合初学者-Verilog testbench of writing and techniques for beginners
Platform: | Size: 37888 | Author: ni husheng | Hits:

[Other] Verilog-Testbench-desin

Description: Verilog Testbench设计技巧和策略，详细介绍了testbench的结构，并且给出了结构化testbench的设计实例-verilog testbench design
Platform: | Size: 132096 | Author: 刘云 | Hits:

[VHDL-FPGA-Verilog] Verilog-testbench-and-memory-I2C

Description: verilog编写的测试平台，内含具体project和储存模块的编写-Verilog testbench for digital design Memory I2C module Assignment
Platform: | Size: 484352 | Author: ligang | Hits:

[VHDL-FPGA-Verilog] verilog add4

Description: 分两部分，基于verilog的四位和八位加法器设计，用synopsys的VCS仿真工具进行功能仿真，掌握基本的makefile编写以及linux操作。(Divided into two parts, four and eight adder based on verilog design, function simulation with synopsys VCS simulation tools, master the basic makefile writing and Linux.)
Platform: | Size: 512000 | Author: yzzls | Hits:
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